Dynamic Microarchitecture Adaptation Using Machine Learning
Summary
The USPTO published patent application US20260093501A1 by inventors Zhu Zhou, Bin Li, Gilles Pokam, and Wessam Elhefnawy for dynamic microarchitecture adaptation using machine learning. The invention discloses a reinforcement learning model trained on microarchitectural performance data to configure processor settings based on telemetry and workload characteristics. Application No. 18900524 was filed September 27, 2024.
What changed
The USPTO published patent application US20260093501A1 covering an apparatus and method for dynamic processor microarchitecture adaptation using trained reinforcement learning models. The machine learning model is configured on ML circuitry integral to a processor and determines microarchitectural configuration updates based on telemetry data and workload characteristics. The application was filed September 27, 2024, with inventors from the computing and semiconductor fields.
Patent applications do not create compliance obligations or deadlines. Technology companies, chip manufacturers, and AI hardware developers should review this published application to assess potential patent landscape implications for their own products. Competitors developing similar adaptive processor or AI accelerator technologies may need to evaluate freedom-to-operate considerations.
Archived snapshot
Apr 2, 2026GovPing captured this document from the original source. If the source has since changed or been removed, this is the text as it existed at that time.
APPARATUS AND METHOD FOR DYNAMIC MICROARCHITECTURE ADAPTION USING MACHINE LEARNING TO IMPROVE CORE PERFORMANCE
Application US20260093501A1 Kind: A1 Apr 02, 2026
Inventors
Zhu Zhou, Bin Li, Gilles Pokam, Wessam Elhefnawy
Abstract
An apparatus and method for dynamic microarchitecture adaptation based on machine learning implementations. For example, one embodiment of a method comprises: configuring a trained reinforcement learning model on a machine learning circuitry integral to a first processor of a first processor type, the trained reinforcement learning model having been trained with microarchitectural performance data and workload data corresponding to the first processor type; determining, by the machine learning circuitry using the trained reinforcement learning model, microarchitectural configuration updates based on first telemetry data and characteristics of workloads to be executed; and applying the microarchitectural configuration updates on the first processor.
CPC Classifications
G06F 9/44505 G06N 3/04 G06N 3/092 G06N 20/00
Filing Date
2024-09-27
Application No.
18900524
Named provisions
Related changes
Get daily alerts for ChangeBridge: Patent Apps - AI & Computing (G06N)
Daily digest delivered to your inbox.
Free. Unsubscribe anytime.
Source
About this page
Every important government, regulator, and court update from around the world. One place. Real-time. Free. Our mission
Source document text, dates, docket IDs, and authority are extracted directly from USPTO.
The plain-English summary, classification, and "what to do next" steps are AI-generated from the original text. Cite the source document, not the AI analysis.
Classification
Who this affects
Taxonomy
Browse Categories
Get alerts for this source
We'll email you when ChangeBridge: Patent Apps - AI & Computing (G06N) publishes new changes.