Samsung Patent Application for Semiconductor Device

ChangeBridge: Patent Apps - AI & Computing (G06N)

Published February 14th, 2025

Detected March 23rd, 2026

Summary

The USPTO has published a patent application from Samsung Electronics Co., Ltd. for a novel semiconductor device. The application details a specific structure involving a channel layer, a ferroelectric layer with a unique interface region, and a gate electrode, aiming to improve semiconductor performance.

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What changed

USPTO Patent Application US20260082578A1, filed by Samsung Electronics Co., Ltd. on February 14, 2025, describes a semiconductor device featuring a channel layer, a ferroelectric layer with a distinct interface region composed of different materials (e.g., Mo, TiN, W, ITO as a first material and Al, Ti, Ta as a second material), and a gate electrode. The application also covers an electronic apparatus incorporating this device and its manufacturing method.

This is a patent application, not a rule or guidance, and therefore carries no immediate compliance obligations. However, it signifies potential future technological advancements in semiconductor design that could impact manufacturers in the electronics and computing sectors. Companies involved in semiconductor research and development should be aware of this filing as it pertains to intellectual property in the field.

Source document (simplified)

← USPTO Patent Applications

SEMICONDUCTOR DEVICE, ELECTRONIC APPARATUS INCLUDING THE SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE

Application US20260082578A1 Kind: A1 Mar 19, 2026

Assignee

Samsung Electronics Co., Ltd.

Inventors

Donghoon KIM, Seunggeol NAM, Sijung YOO, Dukhyun CHOE

Abstract

Provided are a semiconductor device, an electronic apparatus including the semiconductor device, and a method of manufacturing the semiconductor device. The semiconductor device includes a channel layer, a ferroelectric layer on the channel layer, and a gate electrode on the ferroelectric layer, wherein the ferroelectric layer includes an interface region, the interface region being a local region of the ferroelectric layer from an interface between the ferroelectric layer and the channel layer to a certain distance, the interface region includes a first material and a second material different from the first material, the first material includes at least one of Mo, TiN, W, or ITO, and the second material includes at least one of Al, Ti, or Ta.