Quantum Computing Surface Code Simulation Patent - Fujitsu

ChangeBridge: Patent Grants - AI & Computing (G06N)

Published March 31st, 2026

Detected March 31st, 2026

Summary

USPTO granted Fujitsu Limited patent US12591801B2 for a quantum computing simulation program that performs error correction using surface codes on a two-dimensional lattice arrangement of data and auxiliary qubits. The patent covers methods for detecting and correcting logical errors in quantum computations by analyzing data qubit patterns in rows and columns. Seven claims were allowed.

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What changed

USPTO issued patent US12591801B2 to Fujitsu Limited on March 31, 2026, covering a non-transitory computer-readable recording medium storing a simulation program for quantum computing error correction. The patent describes generating qubit information for a 2D lattice with alternating data and auxiliary qubits, setting error information on data qubits, inverting auxiliary qubit states for error detection, and using surface code methods to determine logical error occurrence based on data qubit patterns.

No compliance action is required from companies. This is a patent grant announcement, not a regulatory requirement. Companies developing quantum computing technologies may want to review the claims to assess potential licensing needs or freedom-to-operate considerations. The patent does not impose obligations but rather grants exclusionary rights to Fujitsu.

Source document (simplified)

← USPTO Patent Grants

Non-transitory computer-readable recording medium storing simulation program, simulation method, and information processing device

Grant US12591801B2 Kind: B2 Mar 31, 2026

Assignee

Fujitsu Limited

Inventors

Jun Fujisaki

Abstract

An information processing device configured to execute processing including: generating qubit information indicating a two-dimensional lattice in which data qubits and auxiliary qubits are alternately arranged in a row and column direction; setting, for the qubit information, error information indicating error occurrence in a first data qubit among the data qubits; setting, for the qubit information, error detection information by inverting, from an initial value, a state of an auxiliary qubit adjacent to the first data qubit in the row or column direction; setting, for the qubit information, error correction information indicating a second data qubit to be corrected by a surface code using the error detection information; and determining presence or absence of occurrence of a logical error, based on a number of data qubits each of which corresponds to any one of the first or second data qubit in one row or one column in the two-dimensional lattice.