Patent Application: Error Correction for Chip-to-Chip Interfaces

ChangeBridge: Patent Apps - Networking (H04L)

Detected March 27th, 2026

Summary

The USPTO has published a new patent application (US20260088927A1) detailing system-level techniques for error correction in chip-to-chip interfaces within chiplet systems. The application describes methods for detecting errors, requesting retransmissions, and managing retransmission modes to ensure data integrity.

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What changed

This document is a patent application (US20260088927A1) filed with the USPTO, describing novel system-level techniques for error correction in chip-to-chip interfaces, particularly within chiplet systems. The application outlines a method where a first chiplet detects errors in received data messages, requests retransmission from a second chiplet, and manages an idle state until the retransmission is complete. This aims to improve data integrity in complex integrated systems.

As this is a patent application, it does not impose immediate regulatory obligations or compliance deadlines on entities. However, companies involved in semiconductor design, chiplet technology, or high-speed data interconnects should monitor this application and related patents. Successful patent grants could lead to licensing requirements or influence future product development and industry standards in advanced computing and networking hardware.

Source document (simplified)

← USPTO Patent Applications

SYSTEM-LEVEL TECHNIQUES FOR ERROR CORRECTION IN CHIP-TO-CHIP INTERFACES

Application US20260088927A1 Kind: A1 Mar 26, 2026

Inventors

Millind MITTAL, Krishnan SRINIVASAN, Kenneth MA

Abstract

Some examples described herein provide for interconnect in chiplet systems, for example system-level techniques for error correction in chip-to-chip interfaces. In an example, a method of error correction includes receiving, at a first chiplet, a data message via a set of interconnect, and transmitting a first control message that requests retransmission of the data message based on detecting an error associated with receiving the data message. The method also includes transmitting one or more instances of a second control message that indicates an idle operation at the first chiplet until the first chiplet receives a third control message that triggers an end of a retransmission mode. The method also includes transmitting a fourth control message frame indicating the end of the retransmission mode, and receiving a retransmission of the data message from the second chiplet.