USPTO Patent Grant: Analog-Digital Hybrid Computing Neuromorphic System

ChangeBridge: Patent Grants - AI & Computing (G06N)

Published March 24th, 2026

Detected March 25th, 2026

Summary

The USPTO has granted a patent (US12586636B2) for an analog-digital hybrid computing neuromorphic system. The patent, assigned to IHW INC., details a system utilizing non-volatile memory cells for synaptic units and a digital calculation section for processing.

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What changed

The United States Patent and Trademark Office (USPTO) has issued patent US12586636B2 for an "Analog-digital hybrid computing method and neuromorphic system using the same." The patent, assigned to IHW INC., describes a neuromorphic system that integrates analog and digital processing components. Key features include an input signal section, a synapse section with non-volatile memory cells arranged in a memory array, a digital calculation section for processing digitized output signals, and a controller section to manage these components. The system is designed to store logic states in memory cells according to predetermined weights and process input signals to generate output signals.

This patent grant is primarily of interest to entities involved in the research, development, and manufacturing of advanced computing hardware, particularly in the fields of artificial intelligence and neuromorphic engineering. While patent grants do not impose direct regulatory obligations on other entities, they establish intellectual property rights that can influence market competition and product development. Companies operating in the AI and semiconductor sectors should be aware of this patent, especially if their activities involve similar hybrid computing architectures or neuromorphic system designs, to ensure they do not infringe on the granted claims.

Source document (simplified)

← USPTO Patent Grants

Analog-digital hybrid computing method and neuromorphic system using the same

Grant US12586636B2 Kind: B2 Mar 24, 2026

Assignee

IHW INC.

Inventors

Jun-sung Kim, Sang-hoon Yoon

Abstract

A neuromorphic system according to an embodiment of the invention includes an input signal section that generates an input signal, a synapse section that includes a plurality of synaptic units that receive the input signal and makes a current to flow according to a set weight, each of the plurality of synaptic units including a plurality of non-volatile memory cells capable of selectively storing a logical state, the non-volatile memory cells being arranged in a memory array that include input electrode lines and output electrode lines crossing each other, and generates an output signal for each output electrode line by the input signal, a digital calculation section that digitizes the output signal generated for each output electrode line and calculates a sum of the digitized output signals, and a controller section that controls the input signal section, the synapse section, and the digital calculation section, and the controller section designates the number of digitized digits for each output electrode line and stores the logic state in the plurality of non-volatile memory cells according to a predetermined weight in each of the plurality of synaptic units, causes the input signal generated by the input signal section to be applied to each of a plurality of non-volatile memory cells of each of the plurality of synaptic units through the input electrode lines, generates, as the output signal, a sum of currents flowing from the plurality of non-volatile memory cells of each of the plurality of synaptic units by the applied input signal for each output electrode line, and causes the digital calculation section to digitize the output signal generated for each output electrode line according to the number of digits and calculate the sum of the digitized output signals.