Changeflow GovPing Banking & Finance USPTO Patent US12586056B2: Microprocessor Secur...
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USPTO Patent US12586056B2: Microprocessor Security Layer for Credit Card Readers

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Published March 24th, 2026
Detected March 25th, 2026
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Summary

The USPTO has granted patent US12586056B2 to SUMUP PAYMENTS LTD. for a microprocessor security layer designed for credit card readers. This patent introduces an alternative security configuration using integrated circuits to potentially reduce reader size and cost while maintaining security compliance.

What changed

The United States Patent and Trademark Office (USPTO) has granted patent US12586056B2 to SUMUP PAYMENTS LTD. The patent covers a "Microprocessor security layer for credit card readers," specifically detailing an alternative security configuration that may replace portions of traditional electrically active mesh with integrated circuits. This innovation aims to enhance security for credit card processing readers, particularly concerning the protection of sensitive components that handle transaction data, while potentially reducing the overall size and cost of the reader.

This patent grant is primarily informational for entities involved in payment processing technology and hardware manufacturing. While it does not impose new regulatory obligations or compliance deadlines, it signifies a technological advancement in payment security. Companies in the payment processing sector, particularly those developing or manufacturing credit card readers, should be aware of this patented technology as it may impact future product development and intellectual property considerations.

Source document (simplified)

← USPTO Patent Grants

Microprocessor as a security layer

Grant US12586056B2 Kind: B2 Mar 24, 2026

Assignee

SUMUP PAYMENTS LTD.

Inventors

Stefano Bianconi

Abstract

Various aspects of the disclosure generally relate to security for a credit card processing reader. Part of security for a reader is protecting sensitive components, for example components that access information from a credit card during a transaction. An alternative security configuration may include integrated circuits replacing portions of electrically active mesh. This may reduce the size and cost of a reader while maintaining its security with respect to published guidelines.

CPC Classifications

G06Q 20/34 G06K 7/006 G06K 7/10297

Filing Date

2024-08-19

Application No.

18809266

Claims

20

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Named provisions

Microprocessor as a security layer

Classification

Agency
USPTO
Published
March 24th, 2026
Instrument
Notice
Legal weight
Non-binding
Stage
Final
Change scope
Minor
Document ID
US12586056B2

Who this affects

Applies to
Retailers Technology companies
Industry sector
3341 Computer & Electronics Manufacturing 5222 Fintech & Digital Payments
Activity scope
Payment Processing Security
Geographic scope
United States US

Taxonomy

Primary area
Financial Services
Operational domain
IT Security
Topics
Cybersecurity Technology

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