USPTO Patent Grant: Hybrid Semiconductor-Superconductor Device
Summary
The USPTO has granted patent US12581869B2 to Microsoft Technology Licensing, LLC for a hybrid semiconductor-superconductor device. The patent covers novel device structures and fabrication methods aimed at improving energy level hybridization and gate control in such hybrid systems.
What changed
The United States Patent and Trademark Office (USPTO) has granted patent US12581869B2, titled 'Side-gated semiconductor-superconductor hybrid devices,' to Microsoft Technology Licensing, LLC. The patent, granted on March 17, 2026, details a hybrid device comprising a substrate, semiconductor components, and a superconductor component designed for energy level hybridization. Key innovations include arrangements for gate electrodes to control the semiconductor component and specific methods for fabricating these complex hybrid systems.
This patent grant signifies a new intellectual property asset for Microsoft in the advanced computing and semiconductor space. While patents do not impose direct regulatory obligations, they can influence industry standards, drive innovation, and potentially lead to licensing agreements or future regulatory considerations in areas like quantum computing or advanced electronics manufacturing. Companies operating in these sectors should be aware of this granted patent as it may impact their own research, development, and commercialization strategies.
Source document (simplified)
Side-gated semiconductor-superconductor hybrid devices
Grant US12581869B2 Kind: B2 Mar 17, 2026
Assignee
Microsoft Technology Licensing, LLC
Inventors
Marina Quintero Pérez, David Johannes Van Woerkom, Vinay Kumar Chinni, Amrita Singh
Abstract
One aspect provides semiconductor-superconductor hybrid device comprises a substrate, a first semiconductor component arranged on the substrate, a superconductor component arranged to be capable of energy level hybridisation with the first semiconductor component, and a second semiconductor component arranged as a gate electrode for gating the first semiconductor component. Another aspect provides a semiconductor-superconductor hybrid device, comprising: a substrate; a semiconductor component arranged on the substrate; a gate electrode for gating the semiconductor component; and a superconductor component capable of undergoing energy level hybridisation with the semiconductor component; wherein the gate electrode is arranged in a channel in the substrate. Also provided are methods of fabricating the semiconductor-superconductor hybrid devices.
CPC Classifications
H10N 60/10 H10N 60/01 H10N 69/00 H10N 60/85 H10N 60/128 G06N 10/40 B82Y 10/00
Filing Date
2020-03-31
Application No.
17907530
Claims
18
Named provisions
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