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USPTO Patent Grant: 3D Hybrid Bonding Memory Devices for AI Inference

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Published March 24th, 2026
Detected March 24th, 2026
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Summary

The USPTO has granted a patent (US12585931B2) for 3D hybrid bonding memory devices designed for AI inference applications. The patent, assigned to Macronix International Co., Ltd., details a platform integrating logic and memory dies with specialized AI processing elements.

What changed

The United States Patent and Trademark Office (USPTO) has issued patent US12585931B2, titled '3D hybrid bonding memory devices with NPU/CPU for AI inference application'. This patent, granted to Macronix International Co., Ltd., describes an AI inference platform that features a logic die with AI processing elements and a memory die with 3D memory cells. The innovation lies in the direct vertical connections between AI processing elements and memory buffers, enabling efficient storage and retrieval of neural network weights for AI computations.

This patent grant is primarily an intellectual property development and does not impose new regulatory obligations on businesses. Companies involved in AI hardware development, semiconductor manufacturing, or AI inference platforms may find the technical details of this patent relevant for their own research and development strategies. No compliance actions or deadlines are associated with this patent grant.

Source document (simplified)

← USPTO Patent Grants

3D hybrid bonding 3D memory devices with NPU/CPU for AI inference application

Grant US12585931B2 Kind: B2 Mar 24, 2026

Assignee

MACRONIX INTERNATIONAL CO., LTD.

Inventors

Hsiang-Lan Lung

Abstract

An AI inference platform comprises a logic die including an array of AI processing elements. Each AI processing element including an activation memory storing activation data for use in neural network computations. The platform includes a memory die that includes an array of 3D memory cells and a page buffer that facilitates storage and retrieval of neural network weights for use in neural network computations. A plurality of vertical connections can directly connect AI processing elements in the logic die and page buffers of corresponding ones of the memory cells in the memory die, enabling storage or retrieval of a neural network weight to and from a particular page buffer of a corresponding 3D memory cell for use in neural network computations conducted by a corresponding AI processing element in the logic die.

CPC Classifications

G06N 3/063 G06N 3/048 G06N 3/045 G06N 3/065 G06N 5/04 H10B 80/00

Filing Date

2023-05-04

Application No.

18143502

Claims

19

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Named provisions

Abstract Claims

Classification

Agency
USPTO
Published
March 24th, 2026
Instrument
Rule
Legal weight
Non-binding
Stage
Final
Change scope
Minor
Document ID
US12585931B2

Who this affects

Applies to
Manufacturers Technology companies
Industry sector
3341 Computer & Electronics Manufacturing 3345 Medical Device Manufacturing
Activity scope
AI Inference Semiconductor Design
Geographic scope
United States US

Taxonomy

Primary area
Intellectual Property
Operational domain
R&D
Topics
Artificial Intelligence Semiconductors

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