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Pipelined Hardware Decoder for Quantum Computing Devices

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Published March 25th, 2026
Detected April 1st, 2026
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Summary

The European Patent Office published Microsoft Technology Licensing LLC's patent application EP4010853A1 for a pipelined hardware decoder designed for quantum computing devices. The application covers eight inventors including notable quantum computing researchers. The patent relates to decoder architectures classified under IPC G06N 10/70 and G06N 10/40, targeting improved quantum error correction processing.

What changed

The EPO published Microsoft Technology Licensing LLC's patent application EP4010853A1 on March 25, 2026, covering a pipelined hardware decoder architecture for quantum computing devices. The invention addresses quantum error correction decoding with a hardware implementation designed for improved throughput. The application names eight inventors including Poulami Das, Nicolas Delfosse, Krysta Svore, and Helmut Katzgraber. Designated states include all EPO member states covering major European markets.

This is a patent publication rather than a regulatory action imposing obligations. Technology companies developing quantum computing hardware or error correction systems should be aware of Microsoft's claimed intellectual property in pipelined decoder architectures. Companies should review the published claims during the patent examination process if potential overlap exists with their own quantum computing technologies. No compliance deadlines or penalties are associated with this publication.

Source document (simplified)

← EPO Patent Bulletin

PIPELINED HARDWARE DECODER FOR QUANTUM COMPUTING DEVICES

Publication EP4010853A1 Kind: A1 Mar 25, 2026

Applicants

Microsoft Technology Licensing, LLC

Inventors

DAS, Poulami, DELFOSSE, Nicolas, Guillaume, PATTISON, Christopher, Anand, MANNE, Srilatha, CARMEAN, Douglas, SVORE, Krysta, Marie, KATZGRABER, Helmut, Gottfried

IPC Classifications

G06N 10/70 20220101AFI20260219BHEP G06N 10/40 20220101ALI20260219BHEP G06N 5/01 20230101ALI20260219BHEP G06N 3/045 20230101ALI20260219BHEP G06F 18/2323 20230101ALI20260219BHEP

Designated States

AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LI, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR

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Named provisions

Pipelined Hardware Decoder for Quantum Computing Devices

Classification

Agency
EPO
Published
March 25th, 2026
Instrument
Notice
Legal weight
Non-binding
Stage
Final
Change scope
Minor
Document ID
EP4010853A1

Who this affects

Applies to
Technology companies Manufacturers
Industry sector
3341 Computer & Electronics Manufacturing 5112 Software & Technology
Activity scope
Patent Filing Quantum Computing Technology Hardware Design
Geographic scope
European Union EU

Taxonomy

Primary area
Artificial Intelligence
Operational domain
Legal
Topics
Quantum Computing Hardware Design Technology Patents

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