Accelerator generating enable signal
Assignee
Electronics and Telecommunications Research Institute
Inventors
Seong-Cheon Park, Jung-Chan Na, Hyunwoo Kim, Suyeon Jang
Abstract
Disclosed is an accelerator which includes a first to a K-th stage performing an NTT (Number Theoretic Transform) operation of first input data including a polynomial of a homomorphic ciphertext, the first to K-th stages being connected in series, and a first assist circuit generating a first to a K-th enable signal based on a degree of the polynomial of the first input data. Each of the first to K-th stages performs a butterfly operation of the first input data or corresponding output data of a previous stage in response to that the corresponding enable signal among the first to K-th enable signals indicates a first logical value, and bypasses the first input data or the corresponding output data of the previous stage in response to that the corresponding enable signal among the first to K-th enable signals indicates a second logical value.
CPC Classifications
Filing Date
2023-09-12
Application No.
18465861
Claims
17