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Current sense circuit

Grant US12578364B2 Kind: B2 Mar 17, 2026

Assignee

Renesas Electronics Corporation

Inventors

Yoshiaki Ishizeki, Makoto Tanaka

Abstract

A current sense circuit is provided. The circuit includes a current mirror circuit QN1, QN2, and diode-connected QP1, QP2, QP3, and QP4 with their bases connected together, stacking such that the diode-connected side (QN1, QP1, QP3) aligns and connecting the emitter of QP2 to the collector of QP4. Furthermore, the gates of MP1 and MP2 are connected to the collector of QN2 and QP2, respectively. Additionally, the source of MP1 is connected to the drain of MP3 via the source of MP2 and also connected to the source of a Sense MOS. Moreover, the emitter of QP4 is connected to the source of MP4 via R1, and the drain of MP4 is connected to the source (OUT terminal) of a Main MOS. Furthermore, the gates of MP3 and MP4 are connected to the emitters of QN1 and QN2.

CPC Classifications

G01R 19/165 G01R 19/16504 G01R 19/16519 G01R 19/16542 H02H 9/02 H02H 9/025 H03K 17/08 H03K 17/081 H03K 17/08104 H03K 17/08112 H02J 1/108 H02J 7/0034

Filing Date

2024-09-12

Application No.

18883388

Claims

7