ROBUST FPGA BASED INTERFACE TO ALLOW SERIAL COMMUNICATIONS WITH EMBEDDED CLOCKING BETWEEN DEVICES WITH GROUND POTENTIAL DIFFERENCES

Abstract

A bi-directional full-duplex interface or serial communication interface operable to connected to a first device and a second device to decode or encode a signal between the first device and the second device in the first line code or the second line code. The bi-directional full-duplex interface includes a receive path that converts a first data signal output from the first device at a first communication rate to a second line code for the second device where the first communicate rate is slower than the second line code. The bi-directional full-duplex interface also includes a transmit path that converts a second data signal output from the second device at the second communication rate to the first line code for the first device.

CPC Classifications