LAYOUT PLACEMENT METHOD, INTEGRATED CIRCUIT DESIGN METHOD INCLUDING THE SAME, AND INTEGRATED CIRCUIT DESIGN SYSTEM

Abstract

An example method includes extracting a plurality of sub-cells based on netlist data; generating a first plurality of layout elements corresponding to the plurality of sub-cells; performing virtual placement of the first plurality of layout elements to obtain at least one virtually placed layout, the first plurality of layout elements corresponding to a plurality of layout elements that at least one template contains; selecting, based on evaluating the at least one virtually placed layout, a first template from the at least one template; and placing and routing the first plurality of layout elements based on the first template.

CPC Classifications